This invention relates to photolithographic reticles, and, more particularly, to reticles with electrostatic discharge protection structures.
Integrated circuits contain patterns of conductive wires and semiconductor device structures. These patterned structures are typically less than a micron in width. Narrow features such as these are fabricated using photolithographic semiconductor manufacturing techniques.
In a typical photolithography process, templates called photolithographic reticles or photomasks are used to impress patterns of ultraviolet light rays on the surface of a semiconductor wafer. The patterned ultraviolet light is used in creating corresponding patterns in photosensitive photoresist layers on the surface of a wafer. Subsequent processing steps are used to impress the photoresist patterns on underlying material layers. For example, patterned photoresist layers may be used as etch masks for etching layers of insulator or metal. Patterned photoresist layers can also be used as implant masks.
Modern photolithography uses step-and-repeat lithographic techniques in which portions of a wafer are exposed one at a time. Step-and-repeat photolithography tools contain ultraviolet light sources and focusing optics. During operation, a desired photolithographic reticle is inserted into a holder in the step-and-repeat tool. The step-and-repeat tool is then used to repeatedly project the pattern of the reticle onto the surface a semiconductor wafer.
Reticles are typically formed from transparent fused silica substrates. Fused silica is transparent at the short wavelengths of light that are typically used in semiconductor manufacturing operations. Opaque structures are formed on the fused silica by depositing and patterning a layer of metal such as chrome. In the step-and-repeat photolithography tool, the patterned chrome (chromium) structures that are formed on the surface of the fused silica substrate are used to selectively block the ultraviolet light and thereby create a desired light pattern on the semiconductor wafer.
Fused silica is not conductive, so there is a potential for electrostatic charge to develop in the chrome layers on the surface of reticle. Charge can build up over time due to handling by an operator. For example, an operator may brush a finger against the surface of the reticle or its holder or may bring the reticle into close proximity of a charged object. Electrostatic charge can also be produced during operations such as reticle cleaning and reticle inspection operations. Even when mounted inside a step-and-repeat tool, reticles are subjected to electric fields and sources of electrostatic charge.
As the amount of electrostatic charge on a reticle builds, the risk of damage to the reticle due to an electrostatic discharge event increases. Particularly on reticles with narrow gaps between opposing metal structures, there is a risk of arcing discharge. Discharge events can damage the reticle by vaporizing or melting the chrome on the reticle. When a reticle that has been damaged in this way is used in a step-and-repeat tool, the damage may result in layout errors. Integrated circuits that are fabricated with damaged reticles may therefore not function properly.
It would therefore be desirable to be able to provide improved ways to prevent electrostatic discharge damage to photolithographic reticles used in fabricating integrated circuits.